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Fixed undefined behavior in ROR/ROL
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parent
3b97d399b1
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@ -106,13 +106,13 @@ static FORCEINLINE void v4_random_math(const struct V4_Instruction* code, v4_reg
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case ROR: \
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{ \
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const uint32_t shift = src % REG_BITS; \
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*dst = (*dst >> shift) | (*dst << (REG_BITS - shift)); \
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*dst = (*dst >> shift) | (*dst << ((REG_BITS - shift) % REG_BITS)); \
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} \
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break; \
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case ROL: \
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{ \
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const uint32_t shift = src % REG_BITS; \
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*dst = (*dst << shift) | (*dst >> (REG_BITS - shift)); \
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*dst = (*dst << shift) | (*dst >> ((REG_BITS - shift) % REG_BITS)); \
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} \
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break; \
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case XOR: \
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