Cypher_Stack/RandomWOW
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185 Commits 8 Branches 5 Tags 3.1 MiB
d43c7db416
Commit Graph

23 Commits

Author SHA1 Message Date
tevador
682000b1a9 Unique scratchpad addresses - interpreter 
Additional writes to L3
 2019-04-16 18:58:44 +02:00
tevador
8c37d4aac3 More refactoring 2019-04-12 19:36:08 +02:00
tevador
2e68c89740 Separate executeSuperscalar function 
Tweaked superscalar hash constants
 2019-04-11 18:31:13 +02:00
tevador
2132e5fef5 SuperscalarHash interpreter 
Linux assembly code
 2019-04-11 00:01:22 +02:00
tevador
b4c02051fa Reworked SuperscalarHash instruction set 
ASM and C code generator for SuperscalarHash
Support for Superscalar hash in the light mode
 2019-04-07 15:38:51 +02:00
tevador
00368cae02 Fixed stats compilation 2019-03-21 09:17:28 +01:00
tevador
007f8599b9 Implemented branches in the interpreter 
Fixed x86 immediate encoding
 2019-03-20 23:38:37 +01:00
tevador
2edf05cedc Implemented Dataset size increase per epoch 2019-03-10 23:14:03 +01:00
tevador
e65d9da66c Configurable parameters separated into configuration.h 2019-03-08 15:34:34 +01:00
tevador
954365634e Fixed alignment of VirtualMachine 2019-02-18 08:54:55 +01:00
tevador
ff0c5a58b3 More compact bytecode 2019-02-15 11:14:40 +01:00
tevador
447e8a1d4f Simplified division in interpreted mode 
Fixed incorrect condition code in JitCompilerX86
Refactoring
 2019-02-15 10:41:02 +01:00
tevador
32d827d0a6 Interpreter with bytecode 
Fixed some undefined behavior with signed types
Fixed different results on big endian systems
Removed unused code files
Restored FNEG_R instructions
Updated documentation
 2019-02-09 15:45:26 +01:00
tevador
ac4462ad42 Renamed floating point instructions 
Fixed negative source operand for FMUL_M and FDIV_M
 2019-02-05 23:43:57 +01:00
tevador
1ee94bef2a Added ISWAP instruction 
Scratchpad -> 2 MiB
New scratchpad initialization
New dataset initialization
 2019-02-04 17:07:00 +01:00
tevador
bd0dba88a8 4 scratchpad segments 2019-01-20 00:44:01 +01:00
tevador
8b1102ee05 Interpreter + async mode 2019-01-15 00:01:11 +01:00
tevador
d1a808643d Random accesses - JIT compiler 2019-01-10 22:04:55 +01:00
tevador
3caecc7646 Vector FPU instructions 
JitCompilerX86 - static code written in asm
Updated ALU/FPU tests
Updated instruction weights
 2018-12-31 19:06:45 +01:00
tevador
76b6b05cf2 Unconditional RET 2018-12-28 12:09:37 +01:00
tevador
740c40b218 8 branch conditions for CALL/RET 2018-12-21 22:41:35 +01:00
tevador
ffa67295c4 Instruction statistics 2018-12-20 22:42:47 +01:00
tevador
c9102ee88c RandomX portable interpreter 2018-12-11 21:00:30 +01:00