8 Commits

Author	SHA1	Message	Date
tevador	3caecc7646	Vector FPU instructions ... JitCompilerX86 - static code written in asm Updated ALU/FPU tests Updated instruction weights	2018-12-31 19:06:45 +01:00
tevador	a09bee8d60	js -> jz to enable macro-op fusion on Intel CPUs (~1% speed-up)	2018-12-28 14:18:41 +01:00
tevador	55afe9646f	Debuggable assembly generator	2018-12-21 21:09:55 +01:00
tevador	ed0bc906d6	JIT compiler for x86	2018-12-18 22:00:58 +01:00
tevador	ddc29cb4d3	Optimized x86 initialization	2018-12-16 15:10:03 +01:00
tevador	4f276541d2	Modified x86 register allocation	2018-12-16 13:43:18 +01:00
tevador	6332831ec1	Implemented cache shift ... Fixed assembly code generator Fixed an error in the interpreter Updated specification: sign-extended immediates	2018-12-15 23:13:17 +01:00
tevador	cb0721056a	Assembly code generator for Windows 64-bit	2018-12-13 23:11:55 +01:00