tevador
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16db607025
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Scratchpad size increased to 1 MiB
New AES-based scratchpad hashing function
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2019-01-18 23:51:18 +01:00 |
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tevador
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93c324709b
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Related to previous changes
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2019-01-18 19:06:46 +01:00 |
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tevador
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a7ffe8c19a
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Mix dataset cacheline with registers r0-r7
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2019-01-13 21:14:59 +01:00 |
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tevador
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67e741ff22
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Reduced x86 code size by 512 bytes (and ecx -> and eax)
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2019-01-12 20:27:35 +01:00 |
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tevador
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1426fcbab5
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Print average program code size
Fixed assembly for MUL_64 and IMUL_32
Division weight 4 -> 8
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2019-01-12 16:05:09 +01:00 |
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tevador
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2756bcdcfe
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Added magic division to JIT compiler
New B operand selection rules
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2019-01-11 16:53:52 +01:00 |
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tevador
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c02ee4291d
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FPROUND - variable flag offset
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2019-01-11 10:52:12 +01:00 |
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tevador
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e487092f07
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Simplified CALL and RET
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2019-01-11 10:18:24 +01:00 |
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tevador
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557241cd95
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JUMP instruction
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2019-01-11 09:58:06 +01:00 |
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tevador
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d1a808643d
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Random accesses - JIT compiler
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2019-01-10 22:04:55 +01:00 |
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tevador
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b71e0eec65
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Optimizations to reduce code size under 32K
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2019-01-08 14:50:31 +01:00 |
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tevador
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2f6a599ff6
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Inlined calls for memory read
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2019-01-07 17:44:43 +01:00 |
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tevador
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619bee5418
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Random dataset accesses - asm only
Initial support for large pages
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2019-01-04 19:44:15 +01:00 |
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tevador
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3caecc7646
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Vector FPU instructions
JitCompilerX86 - static code written in asm
Updated ALU/FPU tests
Updated instruction weights
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2018-12-31 19:06:45 +01:00 |
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tevador
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740c40b218
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8 branch conditions for CALL/RET
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2018-12-21 22:41:35 +01:00 |
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tevador
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4f276541d2
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Modified x86 register allocation
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2018-12-16 13:43:18 +01:00 |
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tevador
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6332831ec1
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Implemented cache shift
Fixed assembly code generator
Fixed an error in the interpreter
Updated specification: sign-extended immediates
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2018-12-15 23:13:17 +01:00 |
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tevador
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cb0721056a
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Assembly code generator for Windows 64-bit
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2018-12-13 23:11:55 +01:00 |
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