Cypher_Stack/RandomWOW
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132 Commits 8 Branches 5 Tags 3.1 MiB
2edf05cedc
Commit Graph

27 Commits

Author SHA1 Message Date
tevador
2edf05cedc Implemented Dataset size increase per epoch 2019-03-10 23:14:03 +01:00
tevador
e65d9da66c Configurable parameters separated into configuration.h 2019-03-08 15:34:34 +01:00
tevador
f0d52fcf4d Fixed dependent constants 2019-02-15 11:38:20 +01:00
tevador
0b1761a846 Refactoring: mining/verification mode 2019-02-11 18:57:42 +01:00
tevador
b8ce504be6 Added comments to hashAes1Rx4 and fillAes1Rx4 
Fixed gcc compilation
Added performance numbers
 2019-02-09 19:32:53 +01:00
tevador
32d827d0a6 Interpreter with bytecode 
Fixed some undefined behavior with signed types
Fixed different results on big endian systems
Removed unused code files
Restored FNEG_R instructions
Updated documentation
 2019-02-09 15:45:26 +01:00
tevador
b417fd08ea 16 -> 8 chained programs 
constant address loads are always from L3
 2019-02-05 23:06:44 +01:00
tevador
1ee94bef2a Added ISWAP instruction 
Scratchpad -> 2 MiB
New scratchpad initialization
New dataset initialization
 2019-02-04 17:07:00 +01:00
tevador
8f2abd6c05 NOP instruction 
register load/store from L3
 2019-01-27 18:19:49 +01:00
tevador
005c67f64c Added explicit STORE instructions 
JIT compiler
 2019-01-27 10:52:30 +01:00
tevador
d2cb086221 ASM code generator for "small" programs that fit into the uOP cache 2019-01-24 19:29:59 +01:00
tevador
16db607025 Scratchpad size increased to 1 MiB 
New AES-based scratchpad hashing function
 2019-01-18 23:51:18 +01:00
tevador
89bc68d093 Memory-bound dataset initialization 2019-01-18 18:44:06 +01:00
tevador
4fb168e249 Large page support for cache 
Bug fixes
 2019-01-18 17:57:47 +01:00
tevador
8b1102ee05 Interpreter + async mode 2019-01-15 00:01:11 +01:00
tevador
48d85643de Dataset intialization algorithm (AES) 2019-01-13 13:47:25 +01:00
tevador
d1a808643d Random accesses - JIT compiler 2019-01-10 22:04:55 +01:00
tevador
2f6a599ff6 Inlined calls for memory read 2019-01-07 17:44:43 +01:00
tevador
3caecc7646 Vector FPU instructions 
JitCompilerX86 - static code written in asm
Updated ALU/FPU tests
Updated instruction weights
 2018-12-31 19:06:45 +01:00
tevador
39c569ae44 Fixed a potential crash in JitCompilerX86 2018-12-27 21:42:38 +01:00
tevador
55afe9646f Debuggable assembly generator 2018-12-21 21:09:55 +01:00
tevador
b9d2d853aa Support for multiple threads 2018-12-19 21:54:44 +01:00
tevador
cb12feaf91 t1ha2 hash for scratchpad digest 2018-12-19 12:38:10 +01:00
tevador
ed0bc906d6 JIT compiler for x86 2018-12-18 22:00:58 +01:00
tevador
6332831ec1 Implemented cache shift 
Fixed assembly code generator
Fixed an error in the interpreter
Updated specification: sign-extended immediates
 2018-12-15 23:13:17 +01:00
tevador
cb0721056a Assembly code generator for Windows 64-bit 2018-12-13 23:11:55 +01:00
tevador
c9102ee88c RandomX portable interpreter 2018-12-11 21:00:30 +01:00