RandomWOW

Cypher_Stack/RandomWOW

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Commit Graph

Author	SHA1	Message	Date
tevador	91cd35ff13	Decrease the frequency of FADD/FSUB in favor of FMUL (#77 ) * this better matches CPU capabilities since execution ports are usually split 1:1 between fadd and fmul * the frequency of FSWAP_R decreased from 8 to 4 (it's ASIC-friendly) * activate IROL_R instruction	2019-06-22 16:05:22 +02:00
tevador	0c5b666df4	Configuration guidelines (#59 ) * added detailed guidelines for the selection of configuration values * added additional compile-time checks to prevent bad configurations * removed RANDOMX_SUPERSCALAR_MAX_SIZE parameter	2019-06-10 15:57:36 +02:00
tevador	c1314dc2a2	Use values from configuration.h in assembly code	2019-05-06 18:14:00 +02:00

Author

SHA1

Message

Date

tevador

91cd35ff13

Decrease the frequency of FADD/FSUB in favor of FMUL (#77 )

* this better matches CPU capabilities since execution ports are usually split 1:1 between fadd and fmul
* the frequency of FSWAP_R decreased from 8 to 4 (it's ASIC-friendly)
* activate IROL_R instruction

2019-06-22 16:05:22 +02:00

tevador

0c5b666df4

Configuration guidelines (#59 )

* added detailed guidelines for the selection of configuration values
* added additional compile-time checks to prevent bad configurations
* removed RANDOMX_SUPERSCALAR_MAX_SIZE parameter

2019-06-10 15:57:36 +02:00

tevador

c1314dc2a2

Use values from configuration.h in assembly code

2019-05-06 18:14:00 +02:00

3 Commits