11 Commits

Author	SHA1	Message	Date
tevador	32d827d0a6	Interpreter with bytecode ... Fixed some undefined behavior with signed types Fixed different results on big endian systems Removed unused code files Restored FNEG_R instructions Updated documentation	2019-02-09 15:45:26 +01:00
tevador	bd0dba88a8	4 scratchpad segments	2019-01-20 00:44:01 +01:00
tevador	8b1102ee05	Interpreter + async mode	2019-01-15 00:01:11 +01:00
tevador	1426fcbab5	Print average program code size ... Fixed assembly for MUL_64 and IMUL_32 Division weight 4 -> 8	2019-01-12 16:05:09 +01:00
tevador	6519fed4d1	Combined prefetch + read into a single step	2019-01-07 11:26:43 +01:00
tevador	3caecc7646	Vector FPU instructions ... JitCompilerX86 - static code written in asm Updated ALU/FPU tests Updated instruction weights	2018-12-31 19:06:45 +01:00
tevador	55afe9646f	Debuggable assembly generator	2018-12-21 21:09:55 +01:00
tevador	b9d2d853aa	Support for multiple threads	2018-12-19 21:54:44 +01:00
tevador	ed0bc906d6	JIT compiler for x86	2018-12-18 22:00:58 +01:00
tevador	6332831ec1	Implemented cache shift ... Fixed assembly code generator Fixed an error in the interpreter Updated specification: sign-extended immediates	2018-12-15 23:13:17 +01:00
tevador	cb0721056a	Assembly code generator for Windows 64-bit	2018-12-13 23:11:55 +01:00