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Fixed a bug in FSWAP_R
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parent
c5309fae9e
commit
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@ -109,6 +109,7 @@ namespace RandomX {
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FORCE_INLINE void InterpretedVirtualMachine::executeBytecode(int i, int_reg_t(&r)[8], __m128d (&f)[4], __m128d (&e)[4], __m128d (&a)[4]) {
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FORCE_INLINE void InterpretedVirtualMachine::executeBytecode(int i, int_reg_t(&r)[8], __m128d (&f)[4], __m128d (&e)[4], __m128d (&a)[4]) {
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auto& ibc = byteCode[i];
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auto& ibc = byteCode[i];
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if(trace) printState(r, f, e, a);
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switch (ibc.type)
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switch (ibc.type)
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{
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{
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case InstructionType::IADD_R: {
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case InstructionType::IADD_R: {
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@ -268,7 +269,7 @@ namespace RandomX {
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UNREACHABLE;
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UNREACHABLE;
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}
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}
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if (trace) {
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if (trace) {
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//std::cout << program(i);
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std::cout << program(i);
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if(ibc.type < 20 || ibc.type == 31 || ibc.type == 32)
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if(ibc.type < 20 || ibc.type == 31 || ibc.type == 32)
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print(*ibc.idst);
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print(*ibc.idst);
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else //if(ibc.type >= 20 && ibc.type <= 30)
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else //if(ibc.type >= 20 && ibc.type <= 30)
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@ -673,7 +674,10 @@ namespace RandomX {
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CASE_REP(FSWAP_R) {
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CASE_REP(FSWAP_R) {
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auto dst = instr.dst % RegistersCount;
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auto dst = instr.dst % RegistersCount;
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ibc.type = InstructionType::FSWAP_R;
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ibc.type = InstructionType::FSWAP_R;
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ibc.fdst = &f[dst];
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if (dst < 4)
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ibc.fdst = &f[dst];
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else
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ibc.fdst = &e[dst - 4];
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} break;
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} break;
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CASE_REP(FADD_R) {
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CASE_REP(FADD_R) {
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