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Update documentation
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@ -107,14 +107,15 @@ The reference implementation has been validated on the following platforms:
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* PPC64 (64-bit, big-endian)
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* PPC64 (64-bit, big-endian)
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## Acknowledgements
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## Acknowledgements
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* [tevador](https://github.com/tevador) - author
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* [SChernykh](https://github.com/SChernykh) - contributed significantly to the design of RandomX
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* [SChernykh](https://github.com/SChernykh) - contributed significantly to the design of RandomX
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* [hyc](https://github.com/hyc) - original idea of using random code execution for PoW
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* [hyc](https://github.com/hyc) - original idea of using random code execution for PoW
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* Other contributors: [nioroso-x3](https://github.com/nioroso-x3), [jtgrassie](https://github.com/jtgrassie)
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* [Other contributors](https://github.com/tevador/RandomX/graphs/contributors)
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RandomX uses some source code from the following 3rd party repositories:
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RandomX uses some source code from the following 3rd party repositories:
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* Argon2d, Blake2b hashing functions: https://github.com/P-H-C/phc-winner-argon2
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* Argon2d, Blake2b hashing functions: https://github.com/P-H-C/phc-winner-argon2
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The author of RandomX declares no competing financial interest in RandomX adoption, other than being a holder of Monero. The development of RandomX was funded from the author's own pocket with only the help listed above.
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The author of RandomX declares no competing financial interest.
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## Donations
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## Donations
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@ -124,4 +125,4 @@ Author's XMR address:
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```
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```
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845xHUh5GvfHwc2R8DVJCE7BT2sd4YEcmjG8GNSdmeNsP5DTEjXd1CNgxTcjHjiFuthRHAoVEJjM7GyKzQKLJtbd56xbh7V
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845xHUh5GvfHwc2R8DVJCE7BT2sd4YEcmjG8GNSdmeNsP5DTEjXd1CNgxTcjHjiFuthRHAoVEJjM7GyKzQKLJtbd56xbh7V
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```
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```
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Total donations received: ~3.74 XMR (as of 9th July 2019). Thanks to all contributors.
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Total donations received: ~3.86 XMR (as of 30th August 2019). Thanks to all contributors.
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doc/program.asm
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Load Diff
@ -553,7 +553,7 @@ For integer instructions, the destination is always an integer register (registe
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|frequency|instruction|dst|src|`src == dst ?`|operation|
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|frequency|instruction|dst|src|`src == dst ?`|operation|
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|25/256|IADD_RS|R|R|`src = dst`|`dst = dst + (src << mod.shift) (+ imm32)`|
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|16/256|IADD_RS|R|R|`src = dst`|`dst = dst + (src << mod.shift) (+ imm32)`|
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|7/256|IADD_M|R|R|`src = 0`|`dst = dst + [mem]`|
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|7/256|IADD_M|R|R|`src = 0`|`dst = dst + [mem]`|
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|16/256|ISUB_R|R|R|`src = imm32`|`dst = dst - src`|
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|16/256|ISUB_R|R|R|`src = imm32`|`dst = dst - src`|
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|7/256|ISUB_M|R|R|`src = 0`|`dst = dst - [mem]`|
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|7/256|ISUB_M|R|R|`src = 0`|`dst = dst - [mem]`|
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@ -664,7 +664,7 @@ There are 2 control instructions.
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|frequency|instruction|dst|src|operation|
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|frequency|instruction|dst|src|operation|
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|1/256|CFROUND|-|R|`fprc = src >>> imm32`
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|1/256|CFROUND|-|R|`fprc = src >>> imm32`
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|16/256|CBRANCH|R|-|`dst = dst + cimm`, conditional jump
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|25/256|CBRANCH|R|-|`dst = dst + cimm`, conditional jump
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#### 5.4.1 CFROUND
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#### 5.4.1 CFROUND
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This instruction calculates a 2-bit value by rotating the source register right by `imm32` bits and taking the 2 least significant bits (the value of the source register is unaffected). The result is stored in the `fprc` register. This changes the rounding mode of all subsequent floating point instructions.
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This instruction calculates a 2-bit value by rotating the source register right by `imm32` bits and taking the 2 least significant bits (the value of the source register is unaffected). The result is stored in the `fprc` register. This changes the rounding mode of all subsequent floating point instructions.
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