Fixed non-portable deserialization

This commit is contained in:
tevador 2019-03-11 23:04:34 +01:00
parent 2edf05cedc
commit 958d2bdc15
6 changed files with 68 additions and 63 deletions

View File

@ -91,7 +91,7 @@ namespace RandomX {
} }
int32_t AssemblyGeneratorX86::genAddressImm(Instruction& instr) { int32_t AssemblyGeneratorX86::genAddressImm(Instruction& instr) {
return (int32_t)instr.imm32 & ScratchpadL3Mask; return (int32_t)instr.getImm32() & ScratchpadL3Mask;
} }
//1 uOP //1 uOP
@ -100,7 +100,7 @@ namespace RandomX {
asmCode << "\tadd " << regR[instr.dst] << ", " << regR[instr.src] << std::endl; asmCode << "\tadd " << regR[instr.dst] << ", " << regR[instr.src] << std::endl;
} }
else { else {
asmCode << "\tadd " << regR[instr.dst] << ", " << (int32_t)instr.imm32 << std::endl; asmCode << "\tadd " << regR[instr.dst] << ", " << (int32_t)instr.getImm32() << std::endl;
} }
traceint(instr); traceint(instr);
} }
@ -119,7 +119,7 @@ namespace RandomX {
//1 uOP //1 uOP
void AssemblyGeneratorX86::h_IADD_RC(Instruction& instr, int i) { void AssemblyGeneratorX86::h_IADD_RC(Instruction& instr, int i) {
asmCode << "\tlea " << regR[instr.dst] << ", [" << regR[instr.dst] << "+" << regR[instr.src] << std::showpos << (int32_t)instr.imm32 << std::noshowpos << "]" << std::endl; asmCode << "\tlea " << regR[instr.dst] << ", [" << regR[instr.dst] << "+" << regR[instr.src] << std::showpos << (int32_t)instr.getImm32() << std::noshowpos << "]" << std::endl;
traceint(instr); traceint(instr);
} }
@ -129,7 +129,7 @@ namespace RandomX {
asmCode << "\tsub " << regR[instr.dst] << ", " << regR[instr.src] << std::endl; asmCode << "\tsub " << regR[instr.dst] << ", " << regR[instr.src] << std::endl;
} }
else { else {
asmCode << "\tsub " << regR[instr.dst] << ", " << (int32_t)instr.imm32 << std::endl; asmCode << "\tsub " << regR[instr.dst] << ", " << (int32_t)instr.getImm32() << std::endl;
} }
traceint(instr); traceint(instr);
} }
@ -148,7 +148,7 @@ namespace RandomX {
//1 uOP //1 uOP
void AssemblyGeneratorX86::h_IMUL_9C(Instruction& instr, int i) { void AssemblyGeneratorX86::h_IMUL_9C(Instruction& instr, int i) {
asmCode << "\tlea " << regR[instr.dst] << ", [" << regR[instr.dst] << "+" << regR[instr.dst] << "*8" << std::showpos << (int32_t)instr.imm32 << std::noshowpos << "]" << std::endl; asmCode << "\tlea " << regR[instr.dst] << ", [" << regR[instr.dst] << "+" << regR[instr.dst] << "*8" << std::showpos << (int32_t)instr.getImm32() << std::noshowpos << "]" << std::endl;
traceint(instr); traceint(instr);
} }
@ -158,7 +158,7 @@ namespace RandomX {
asmCode << "\timul " << regR[instr.dst] << ", " << regR[instr.src] << std::endl; asmCode << "\timul " << regR[instr.dst] << ", " << regR[instr.src] << std::endl;
} }
else { else {
asmCode << "\timul " << regR[instr.dst] << ", " << (int32_t)instr.imm32 << std::endl; asmCode << "\timul " << regR[instr.dst] << ", " << (int32_t)instr.getImm32() << std::endl;
} }
traceint(instr); traceint(instr);
} }
@ -233,7 +233,7 @@ namespace RandomX {
asmCode << "\txor " << regR[instr.dst] << ", " << regR[instr.src] << std::endl; asmCode << "\txor " << regR[instr.dst] << ", " << regR[instr.src] << std::endl;
} }
else { else {
asmCode << "\txor " << regR[instr.dst] << ", " << (int32_t)instr.imm32 << std::endl; asmCode << "\txor " << regR[instr.dst] << ", " << (int32_t)instr.getImm32() << std::endl;
} }
traceint(instr); traceint(instr);
} }
@ -257,7 +257,7 @@ namespace RandomX {
asmCode << "\tror " << regR[instr.dst] << ", cl" << std::endl; asmCode << "\tror " << regR[instr.dst] << ", cl" << std::endl;
} }
else { else {
asmCode << "\tror " << regR[instr.dst] << ", " << (instr.imm32 & 63) << std::endl; asmCode << "\tror " << regR[instr.dst] << ", " << (instr.getImm32() & 63) << std::endl;
} }
traceint(instr); traceint(instr);
} }
@ -269,16 +269,16 @@ namespace RandomX {
asmCode << "\trol " << regR[instr.dst] << ", cl" << std::endl; asmCode << "\trol " << regR[instr.dst] << ", cl" << std::endl;
} }
else { else {
asmCode << "\trol " << regR[instr.dst] << ", " << (instr.imm32 & 63) << std::endl; asmCode << "\trol " << regR[instr.dst] << ", " << (instr.getImm32() & 63) << std::endl;
} }
traceint(instr); traceint(instr);
} }
//2 uOPs //2 uOPs
void AssemblyGeneratorX86::h_IMUL_RCP(Instruction& instr, int i) { void AssemblyGeneratorX86::h_IMUL_RCP(Instruction& instr, int i) {
if (instr.imm32 != 0) { if (instr.getImm32() != 0) {
uint32_t divisor = instr.imm32; uint32_t divisor = instr.getImm32();
asmCode << "\tmov rax, " << reciprocal(instr.imm32) << std::endl; asmCode << "\tmov rax, " << reciprocal(instr.getImm32()) << std::endl;
asmCode << "\timul " << regR[instr.dst] << ", rax" << std::endl; asmCode << "\timul " << regR[instr.dst] << ", rax" << std::endl;
traceint(instr); traceint(instr);
} }
@ -401,7 +401,7 @@ namespace RandomX {
//6 uOPs //6 uOPs
void AssemblyGeneratorX86::h_CFROUND(Instruction& instr, int i) { void AssemblyGeneratorX86::h_CFROUND(Instruction& instr, int i) {
asmCode << "\tmov rax, " << regR[instr.src] << std::endl; asmCode << "\tmov rax, " << regR[instr.src] << std::endl;
int rotate = (13 - (instr.imm32 & 63)) & 63; int rotate = (13 - (instr.getImm32() & 63)) & 63;
if (rotate != 0) if (rotate != 0)
asmCode << "\trol rax, " << rotate << std::endl; asmCode << "\trol rax, " << rotate << std::endl;
asmCode << "\tand eax, 24576" << std::endl; asmCode << "\tand eax, 24576" << std::endl;
@ -438,7 +438,7 @@ namespace RandomX {
//4 uOPs //4 uOPs
void AssemblyGeneratorX86::h_COND_R(Instruction& instr, int i) { void AssemblyGeneratorX86::h_COND_R(Instruction& instr, int i) {
asmCode << "\txor ecx, ecx" << std::endl; asmCode << "\txor ecx, ecx" << std::endl;
asmCode << "\tcmp " << regR32[instr.src] << ", " << (int32_t)instr.imm32 << std::endl; asmCode << "\tcmp " << regR32[instr.src] << ", " << (int32_t)instr.getImm32() << std::endl;
asmCode << "\tset" << condition(instr) << " cl" << std::endl; asmCode << "\tset" << condition(instr) << " cl" << std::endl;
asmCode << "\tadd " << regR[instr.dst] << ", rcx" << std::endl; asmCode << "\tadd " << regR[instr.dst] << ", rcx" << std::endl;
traceint(instr); traceint(instr);
@ -448,7 +448,7 @@ namespace RandomX {
void AssemblyGeneratorX86::h_COND_M(Instruction& instr, int i) { void AssemblyGeneratorX86::h_COND_M(Instruction& instr, int i) {
asmCode << "\txor ecx, ecx" << std::endl; asmCode << "\txor ecx, ecx" << std::endl;
genAddressReg(instr); genAddressReg(instr);
asmCode << "\tcmp dword ptr [rsi+rax], " << (int32_t)instr.imm32 << std::endl; asmCode << "\tcmp dword ptr [rsi+rax], " << (int32_t)instr.getImm32() << std::endl;
asmCode << "\tset" << condition(instr) << " cl" << std::endl; asmCode << "\tset" << condition(instr) << " cl" << std::endl;
asmCode << "\tadd " << regR[instr.dst] << ", rcx" << std::endl; asmCode << "\tadd " << regR[instr.dst] << ", rcx" << std::endl;
traceint(instr); traceint(instr);

View File

@ -37,7 +37,7 @@ namespace RandomX {
} }
void Instruction::genAddressImm(std::ostream& os) const { void Instruction::genAddressImm(std::ostream& os) const {
os << "L3" << "[" << (imm32 & ScratchpadL3Mask) << "]"; os << "L3" << "[" << (getImm32() & ScratchpadL3Mask) << "]";
} }
void Instruction::h_IADD_R(std::ostream& os) const { void Instruction::h_IADD_R(std::ostream& os) const {
@ -45,7 +45,7 @@ namespace RandomX {
os << "r" << (int)dst << ", r" << (int)src << std::endl; os << "r" << (int)dst << ", r" << (int)src << std::endl;
} }
else { else {
os << "r" << (int)dst << ", " << (int32_t)imm32 << std::endl; os << "r" << (int)dst << ", " << (int32_t)getImm32() << std::endl;
} }
} }
@ -63,7 +63,7 @@ namespace RandomX {
} }
void Instruction::h_IADD_RC(std::ostream& os) const { void Instruction::h_IADD_RC(std::ostream& os) const {
os << "r" << (int)dst << ", r" << (int)src << ", " << (int32_t)imm32 << std::endl; os << "r" << (int)dst << ", r" << (int)src << ", " << (int32_t)getImm32() << std::endl;
} }
//1 uOP //1 uOP
@ -72,7 +72,7 @@ namespace RandomX {
os << "r" << (int)dst << ", r" << (int)src << std::endl; os << "r" << (int)dst << ", r" << (int)src << std::endl;
} }
else { else {
os << "r" << (int)dst << ", " << (int32_t)imm32 << std::endl; os << "r" << (int)dst << ", " << (int32_t)getImm32() << std::endl;
} }
} }
@ -90,7 +90,7 @@ namespace RandomX {
} }
void Instruction::h_IMUL_9C(std::ostream& os) const { void Instruction::h_IMUL_9C(std::ostream& os) const {
os << "r" << (int)dst << ", " << (int32_t)imm32 << std::endl; os << "r" << (int)dst << ", " << (int32_t)getImm32() << std::endl;
} }
void Instruction::h_IMUL_R(std::ostream& os) const { void Instruction::h_IMUL_R(std::ostream& os) const {
@ -98,7 +98,7 @@ namespace RandomX {
os << "r" << (int)dst << ", r" << (int)src << std::endl; os << "r" << (int)dst << ", r" << (int)src << std::endl;
} }
else { else {
os << "r" << (int)dst << ", " << (int32_t)imm32 << std::endl; os << "r" << (int)dst << ", " << (int32_t)getImm32() << std::endl;
} }
} }
@ -158,7 +158,7 @@ namespace RandomX {
os << "r" << (int)dst << ", r" << (int)src << std::endl; os << "r" << (int)dst << ", r" << (int)src << std::endl;
} }
else { else {
os << "r" << (int)dst << ", " << (int32_t)imm32 << std::endl; os << "r" << (int)dst << ", " << (int32_t)getImm32() << std::endl;
} }
} }
@ -180,7 +180,7 @@ namespace RandomX {
os << "r" << (int)dst << ", r" << (int)src << std::endl; os << "r" << (int)dst << ", r" << (int)src << std::endl;
} }
else { else {
os << "r" << (int)dst << ", " << (imm32 & 63) << std::endl; os << "r" << (int)dst << ", " << (getImm32() & 63) << std::endl;
} }
} }
@ -189,16 +189,16 @@ namespace RandomX {
os << "r" << (int)dst << ", r" << (int)src << std::endl; os << "r" << (int)dst << ", r" << (int)src << std::endl;
} }
else { else {
os << "r" << (int)dst << ", " << (imm32 & 63) << std::endl; os << "r" << (int)dst << ", " << (getImm32() & 63) << std::endl;
} }
} }
void Instruction::h_IMUL_RCP(std::ostream& os) const { void Instruction::h_IMUL_RCP(std::ostream& os) const {
os << "r" << (int)dst << ", " << imm32 << std::endl; os << "r" << (int)dst << ", " << getImm32() << std::endl;
} }
void Instruction::h_ISDIV_C(std::ostream& os) const { void Instruction::h_ISDIV_C(std::ostream& os) const {
os << "r" << (int)dst << ", " << (int32_t)imm32 << std::endl; os << "r" << (int)dst << ", " << (int32_t)getImm32() << std::endl;
} }
void Instruction::h_ISWAP_R(std::ostream& os) const { void Instruction::h_ISWAP_R(std::ostream& os) const {
@ -274,7 +274,7 @@ namespace RandomX {
} }
void Instruction::h_CFROUND(std::ostream& os) const { void Instruction::h_CFROUND(std::ostream& os) const {
os << "r" << (int)src << ", " << (imm32 & 63) << std::endl; os << "r" << (int)src << ", " << (getImm32() & 63) << std::endl;
} }
static inline const char* condition(int index) { static inline const char* condition(int index) {
@ -302,13 +302,13 @@ namespace RandomX {
} }
void Instruction::h_COND_R(std::ostream& os) const { void Instruction::h_COND_R(std::ostream& os) const {
os << "r" << (int)dst << ", " << condition((mod >> 2) & 7) << "(r" << (int)src << ", " << (int32_t)imm32 << ")" << std::endl; os << "r" << (int)dst << ", " << condition((mod >> 2) & 7) << "(r" << (int)src << ", " << (int32_t)getImm32() << ")" << std::endl;
} }
void Instruction::h_COND_M(std::ostream& os) const { void Instruction::h_COND_M(std::ostream& os) const {
os << "r" << (int)dst << ", " << condition((mod >> 2) & 7) << "("; os << "r" << (int)dst << ", " << condition((mod >> 2) & 7) << "(";
genAddressReg(os); genAddressReg(os);
os << ", " << (int32_t)imm32 << ")" << std::endl; os << ", " << (int32_t)getImm32() << ")" << std::endl;
} }
void Instruction::h_ISTORE(std::ostream& os) const { void Instruction::h_ISTORE(std::ostream& os) const {

View File

@ -21,6 +21,7 @@ along with RandomX. If not, see<http://www.gnu.org/licenses/>.
#include <cstdint> #include <cstdint>
#include <iostream> #include <iostream>
#include "blake2/endian.h"
namespace RandomX { namespace RandomX {
@ -74,7 +75,9 @@ namespace RandomX {
uint8_t dst; uint8_t dst;
uint8_t src; uint8_t src;
uint8_t mod; uint8_t mod;
uint32_t imm32; uint32_t getImm32() const {
return load32(&imm32);
}
const char* getName() const { const char* getName() const {
return names[opcode]; return names[opcode];
} }
@ -83,6 +86,7 @@ namespace RandomX {
return os; return os;
} }
private: private:
uint32_t imm32;
void print(std::ostream&) const; void print(std::ostream&) const;
static const char* names[256]; static const char* names[256];
static InstructionVisualizer engine[256]; static InstructionVisualizer engine[256];

View File

@ -435,7 +435,7 @@ namespace RandomX {
ibc.isrc = &r[src]; ibc.isrc = &r[src];
} }
else { else {
ibc.imm = signExtend2sCompl(instr.imm32); ibc.imm = signExtend2sCompl(instr.getImm32());
ibc.isrc = &ibc.imm; ibc.isrc = &ibc.imm;
} }
} break; } break;
@ -450,7 +450,7 @@ namespace RandomX {
ibc.memMask = ((instr.mod % 4) ? ScratchpadL1Mask : ScratchpadL2Mask); ibc.memMask = ((instr.mod % 4) ? ScratchpadL1Mask : ScratchpadL2Mask);
} }
else { else {
ibc.imm = instr.imm32; ibc.imm = instr.getImm32();
ibc.isrc = &ibc.imm; ibc.isrc = &ibc.imm;
ibc.memMask = ScratchpadL3Mask; ibc.memMask = ScratchpadL3Mask;
} }
@ -462,7 +462,7 @@ namespace RandomX {
ibc.type = InstructionType::IADD_RC; ibc.type = InstructionType::IADD_RC;
ibc.idst = &r[dst]; ibc.idst = &r[dst];
ibc.isrc = &r[src]; ibc.isrc = &r[src];
ibc.imm = signExtend2sCompl(instr.imm32); ibc.imm = signExtend2sCompl(instr.getImm32());
} break; } break;
CASE_REP(ISUB_R) { CASE_REP(ISUB_R) {
@ -474,7 +474,7 @@ namespace RandomX {
ibc.isrc = &r[src]; ibc.isrc = &r[src];
} }
else { else {
ibc.imm = signExtend2sCompl(instr.imm32); ibc.imm = signExtend2sCompl(instr.getImm32());
ibc.isrc = &ibc.imm; ibc.isrc = &ibc.imm;
} }
} break; } break;
@ -489,7 +489,7 @@ namespace RandomX {
ibc.memMask = ((instr.mod % 4) ? ScratchpadL1Mask : ScratchpadL2Mask); ibc.memMask = ((instr.mod % 4) ? ScratchpadL1Mask : ScratchpadL2Mask);
} }
else { else {
ibc.imm = instr.imm32; ibc.imm = instr.getImm32();
ibc.isrc = &ibc.imm; ibc.isrc = &ibc.imm;
ibc.memMask = ScratchpadL3Mask; ibc.memMask = ScratchpadL3Mask;
} }
@ -499,7 +499,7 @@ namespace RandomX {
auto dst = instr.dst % RegistersCount; auto dst = instr.dst % RegistersCount;
ibc.type = InstructionType::IMUL_9C; ibc.type = InstructionType::IMUL_9C;
ibc.idst = &r[dst]; ibc.idst = &r[dst];
ibc.imm = signExtend2sCompl(instr.imm32); ibc.imm = signExtend2sCompl(instr.getImm32());
} break; } break;
CASE_REP(IMUL_R) { CASE_REP(IMUL_R) {
@ -511,7 +511,7 @@ namespace RandomX {
ibc.isrc = &r[src]; ibc.isrc = &r[src];
} }
else { else {
ibc.imm = signExtend2sCompl(instr.imm32); ibc.imm = signExtend2sCompl(instr.getImm32());
ibc.isrc = &ibc.imm; ibc.isrc = &ibc.imm;
} }
} break; } break;
@ -526,7 +526,7 @@ namespace RandomX {
ibc.memMask = ((instr.mod % 4) ? ScratchpadL1Mask : ScratchpadL2Mask); ibc.memMask = ((instr.mod % 4) ? ScratchpadL1Mask : ScratchpadL2Mask);
} }
else { else {
ibc.imm = instr.imm32; ibc.imm = instr.getImm32();
ibc.isrc = &ibc.imm; ibc.isrc = &ibc.imm;
ibc.memMask = ScratchpadL3Mask; ibc.memMask = ScratchpadL3Mask;
} }
@ -550,7 +550,7 @@ namespace RandomX {
ibc.memMask = ((instr.mod % 4) ? ScratchpadL1Mask : ScratchpadL2Mask); ibc.memMask = ((instr.mod % 4) ? ScratchpadL1Mask : ScratchpadL2Mask);
} }
else { else {
ibc.imm = instr.imm32; ibc.imm = instr.getImm32();
ibc.isrc = &ibc.imm; ibc.isrc = &ibc.imm;
ibc.memMask = ScratchpadL3Mask; ibc.memMask = ScratchpadL3Mask;
} }
@ -574,14 +574,14 @@ namespace RandomX {
ibc.memMask = ((instr.mod % 4) ? ScratchpadL1Mask : ScratchpadL2Mask); ibc.memMask = ((instr.mod % 4) ? ScratchpadL1Mask : ScratchpadL2Mask);
} }
else { else {
ibc.imm = instr.imm32; ibc.imm = instr.getImm32();
ibc.isrc = &ibc.imm; ibc.isrc = &ibc.imm;
ibc.memMask = ScratchpadL3Mask; ibc.memMask = ScratchpadL3Mask;
} }
} break; } break;
CASE_REP(IMUL_RCP) { CASE_REP(IMUL_RCP) {
uint32_t divisor = instr.imm32; uint32_t divisor = instr.getImm32();
if (divisor != 0) { if (divisor != 0) {
auto dst = instr.dst % RegistersCount; auto dst = instr.dst % RegistersCount;
ibc.type = InstructionType::IMUL_R; ibc.type = InstructionType::IMUL_R;
@ -609,7 +609,7 @@ namespace RandomX {
ibc.isrc = &r[src]; ibc.isrc = &r[src];
} }
else { else {
ibc.imm = signExtend2sCompl(instr.imm32); ibc.imm = signExtend2sCompl(instr.getImm32());
ibc.isrc = &ibc.imm; ibc.isrc = &ibc.imm;
} }
} break; } break;
@ -624,7 +624,7 @@ namespace RandomX {
ibc.memMask = ((instr.mod % 4) ? ScratchpadL1Mask : ScratchpadL2Mask); ibc.memMask = ((instr.mod % 4) ? ScratchpadL1Mask : ScratchpadL2Mask);
} }
else { else {
ibc.imm = instr.imm32; ibc.imm = instr.getImm32();
ibc.isrc = &ibc.imm; ibc.isrc = &ibc.imm;
ibc.memMask = ScratchpadL3Mask; ibc.memMask = ScratchpadL3Mask;
} }
@ -639,7 +639,7 @@ namespace RandomX {
ibc.isrc = &r[src]; ibc.isrc = &r[src];
} }
else { else {
ibc.imm = instr.imm32; ibc.imm = instr.getImm32();
ibc.isrc = &ibc.imm; ibc.isrc = &ibc.imm;
} }
} break; } break;
@ -653,7 +653,7 @@ namespace RandomX {
ibc.isrc = &r[src]; ibc.isrc = &r[src];
} }
else { else {
ibc.imm = instr.imm32; ibc.imm = instr.getImm32();
ibc.isrc = &ibc.imm; ibc.isrc = &ibc.imm;
} }
} break; } break;
@ -750,7 +750,7 @@ namespace RandomX {
ibc.idst = &r[dst]; ibc.idst = &r[dst];
ibc.isrc = &r[src]; ibc.isrc = &r[src];
ibc.condition = (instr.mod >> 2) & 7; ibc.condition = (instr.mod >> 2) & 7;
ibc.imm = instr.imm32; ibc.imm = instr.getImm32();
} break; } break;
CASE_REP(COND_M) { CASE_REP(COND_M) {
@ -760,7 +760,7 @@ namespace RandomX {
ibc.idst = &r[dst]; ibc.idst = &r[dst];
ibc.isrc = &r[src]; ibc.isrc = &r[src];
ibc.condition = (instr.mod >> 2) & 7; ibc.condition = (instr.mod >> 2) & 7;
ibc.imm = instr.imm32; ibc.imm = instr.getImm32();
ibc.memMask = ((instr.mod % 4) ? ScratchpadL1Mask : ScratchpadL2Mask); ibc.memMask = ((instr.mod % 4) ? ScratchpadL1Mask : ScratchpadL2Mask);
} break; } break;
@ -768,7 +768,7 @@ namespace RandomX {
auto src = instr.src % 8; auto src = instr.src % 8;
ibc.isrc = &r[src]; ibc.isrc = &r[src];
ibc.type = InstructionType::CFROUND; ibc.type = InstructionType::CFROUND;
ibc.imm = instr.imm32 & 63; ibc.imm = instr.getImm32() & 63;
} break; } break;
CASE_REP(ISTORE) { CASE_REP(ISTORE) {

View File

@ -242,7 +242,7 @@ namespace RandomX {
} }
void JitCompilerX86::genAddressImm(Instruction& instr) { void JitCompilerX86::genAddressImm(Instruction& instr) {
emit32(instr.imm32 & ScratchpadL3Mask); emit32(instr.getImm32() & ScratchpadL3Mask);
} }
void JitCompilerX86::h_IADD_R(Instruction& instr) { void JitCompilerX86::h_IADD_R(Instruction& instr) {
@ -253,7 +253,7 @@ namespace RandomX {
else { else {
emit(REX_81); emit(REX_81);
emitByte(0xc0 + instr.dst); emitByte(0xc0 + instr.dst);
emit32(instr.imm32); emit32(instr.getImm32());
} }
} }
@ -279,7 +279,7 @@ namespace RandomX {
emit(REX_LEA); emit(REX_LEA);
emitByte(0x84 + 8 * instr.dst); emitByte(0x84 + 8 * instr.dst);
genSIB(0, instr.src, instr.dst); genSIB(0, instr.src, instr.dst);
emit32(instr.imm32); emit32(instr.getImm32());
} }
void JitCompilerX86::h_ISUB_R(Instruction& instr) { void JitCompilerX86::h_ISUB_R(Instruction& instr) {
@ -290,7 +290,7 @@ namespace RandomX {
else { else {
emit(REX_81); emit(REX_81);
emitByte(0xe8 + instr.dst); emitByte(0xe8 + instr.dst);
emit32(instr.imm32); emit32(instr.getImm32());
} }
} }
@ -312,7 +312,7 @@ namespace RandomX {
emit(REX_LEA); emit(REX_LEA);
emitByte(0x84 + 8 * instr.dst); emitByte(0x84 + 8 * instr.dst);
genSIB(3, instr.dst, instr.dst); genSIB(3, instr.dst, instr.dst);
emit32(instr.imm32); emit32(instr.getImm32());
} }
void JitCompilerX86::h_IMUL_R(Instruction& instr) { void JitCompilerX86::h_IMUL_R(Instruction& instr) {
@ -323,7 +323,7 @@ namespace RandomX {
else { else {
emit(REX_IMUL_RRI); emit(REX_IMUL_RRI);
emitByte(0xc0 + 9 * instr.dst); emitByte(0xc0 + 9 * instr.dst);
emit32(instr.imm32); emit32(instr.getImm32());
} }
} }
@ -396,9 +396,9 @@ namespace RandomX {
} }
void JitCompilerX86::h_IMUL_RCP(Instruction& instr) { void JitCompilerX86::h_IMUL_RCP(Instruction& instr) {
if (instr.imm32 != 0) { if (instr.getImm32() != 0) {
emit(MOV_RAX_I); emit(MOV_RAX_I);
emit64(reciprocal(instr.imm32)); emit64(reciprocal(instr.getImm32()));
emit(REX_IMUL_RM); emit(REX_IMUL_RM);
emitByte(0xc0 + 8 * instr.dst); emitByte(0xc0 + 8 * instr.dst);
} }
@ -421,7 +421,7 @@ namespace RandomX {
else { else {
emit(REX_XOR_RI); emit(REX_XOR_RI);
emitByte(0xf0 + instr.dst); emitByte(0xf0 + instr.dst);
emit32(instr.imm32); emit32(instr.getImm32());
} }
} }
@ -449,7 +449,7 @@ namespace RandomX {
else { else {
emit(REX_ROT_I8); emit(REX_ROT_I8);
emitByte(0xc8 + instr.dst); emitByte(0xc8 + instr.dst);
emitByte(instr.imm32 & 63); emitByte(instr.getImm32() & 63);
} }
} }
@ -463,7 +463,7 @@ namespace RandomX {
else { else {
emit(REX_ROT_I8); emit(REX_ROT_I8);
emitByte(0xc0 + instr.dst); emitByte(0xc0 + instr.dst);
emitByte(instr.imm32 & 63); emitByte(instr.getImm32() & 63);
} }
} }
@ -567,7 +567,7 @@ namespace RandomX {
void JitCompilerX86::h_CFROUND(Instruction& instr) { void JitCompilerX86::h_CFROUND(Instruction& instr) {
emit(REX_MOV_RR64); emit(REX_MOV_RR64);
emitByte(0xc0 + instr.src); emitByte(0xc0 + instr.src);
int rotate = (13 - (instr.imm32 & 63)) & 63; int rotate = (13 - (instr.getImm32() & 63)) & 63;
if (rotate != 0) { if (rotate != 0) {
emit(ROL_RAX); emit(ROL_RAX);
emitByte(rotate); emitByte(rotate);
@ -603,7 +603,7 @@ namespace RandomX {
emit(XOR_ECX_ECX); emit(XOR_ECX_ECX);
emit(REX_CMP_R32I); emit(REX_CMP_R32I);
emitByte(0xf8 + instr.src); emitByte(0xf8 + instr.src);
emit32(instr.imm32); emit32(instr.getImm32());
emitByte(0x0f); emitByte(0x0f);
emitByte(condition(instr)); emitByte(condition(instr));
emitByte(0xc1); emitByte(0xc1);
@ -615,7 +615,7 @@ namespace RandomX {
emit(XOR_ECX_ECX); emit(XOR_ECX_ECX);
genAddressReg(instr); genAddressReg(instr);
emit(REX_CMP_M32I); emit(REX_CMP_M32I);
emit32(instr.imm32); emit32(instr.getImm32());
emitByte(0x0f); emitByte(0x0f);
emitByte(condition(instr)); emitByte(condition(instr));
emitByte(0xc1); emitByte(0xc1);

View File

@ -23,6 +23,7 @@ along with RandomX. If not, see<http://www.gnu.org/licenses/>.
#include <ostream> #include <ostream>
#include "common.hpp" #include "common.hpp"
#include "Instruction.hpp" #include "Instruction.hpp"
#include "blake2/endian.h"
namespace RandomX { namespace RandomX {
@ -36,7 +37,7 @@ namespace RandomX {
return os; return os;
} }
uint64_t getEntropy(int i) { uint64_t getEntropy(int i) {
return entropyBuffer[i]; return load64(&entropyBuffer[i]);
} }
private: private:
void print(std::ostream&) const; void print(std::ostream&) const;