mirror of
https://git.wownero.com/wownero/RandomWOW.git
synced 2024-12-22 07:48:54 +00:00
Formatting & refactoring
This commit is contained in:
parent
87b8253374
commit
4c66b2305a
@ -34,8 +34,6 @@ namespace randomx {
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static const char* regE[4] = { "xmm4", "xmm5", "xmm6", "xmm7" };
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static const char* regE[4] = { "xmm4", "xmm5", "xmm6", "xmm7" };
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static const char* regA[4] = { "xmm8", "xmm9", "xmm10", "xmm11" };
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static const char* regA[4] = { "xmm8", "xmm9", "xmm10", "xmm11" };
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static const char* fsumInstr[4] = { "paddb", "paddw", "paddd", "paddq" };
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static const char* regA4 = "xmm12";
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static const char* regA4 = "xmm12";
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static const char* dblMin = "xmm13";
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static const char* dblMin = "xmm13";
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static const char* absMask = "xmm14";
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static const char* absMask = "xmm14";
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@ -58,7 +56,6 @@ namespace randomx {
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instr.src %= RegistersCount;
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instr.src %= RegistersCount;
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instr.dst %= RegistersCount;
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instr.dst %= RegistersCount;
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generateCode(instr, i);
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generateCode(instr, i);
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//asmCode << std::endl;
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}
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}
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}
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}
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@ -494,7 +491,6 @@ namespace randomx {
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//2 uOPs
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//2 uOPs
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void AssemblyGeneratorX86::h_ISWAP_R(Instruction& instr, int i) {
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void AssemblyGeneratorX86::h_ISWAP_R(Instruction& instr, int i) {
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if (instr.src != instr.dst) {
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if (instr.src != instr.dst) {
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//std::swap(registerUsage[instr.dst], registerUsage[instr.src]);
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registerUsage[instr.dst] = i;
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registerUsage[instr.dst] = i;
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registerUsage[instr.src] = i;
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registerUsage[instr.src] = i;
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asmCode << "\txchg " << regR[instr.dst] << ", " << regR[instr.src] << std::endl;
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asmCode << "\txchg " << regR[instr.dst] << ", " << regR[instr.src] << std::endl;
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@ -516,7 +512,6 @@ namespace randomx {
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instr.dst %= 4;
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instr.dst %= 4;
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instr.src %= 4;
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instr.src %= 4;
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asmCode << "\taddpd " << regF[instr.dst] << ", " << regA[instr.src] << std::endl;
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asmCode << "\taddpd " << regF[instr.dst] << ", " << regA[instr.src] << std::endl;
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//asmCode << "\t" << fsumInstr[instr.mod % 4] << " " << signMask << ", " << regF[instr.dst] << std::endl;
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traceflt(instr);
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traceflt(instr);
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}
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}
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@ -534,7 +529,6 @@ namespace randomx {
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instr.dst %= 4;
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instr.dst %= 4;
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instr.src %= 4;
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instr.src %= 4;
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asmCode << "\tsubpd " << regF[instr.dst] << ", " << regA[instr.src] << std::endl;
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asmCode << "\tsubpd " << regF[instr.dst] << ", " << regA[instr.src] << std::endl;
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//asmCode << "\t" << fsumInstr[instr.mod % 4] << " " << signMask << ", " << regF[instr.dst] << std::endl;
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traceflt(instr);
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traceflt(instr);
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}
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}
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@ -40,12 +40,6 @@ along with RandomX. If not, see<http://www.gnu.org/licenses/>.
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//Dataset size in bytes. Must be a power of 2.
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//Dataset size in bytes. Must be a power of 2.
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#define RANDOMX_DATASET_SIZE (2ULL * 1024 * 1024 * 1024)
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#define RANDOMX_DATASET_SIZE (2ULL * 1024 * 1024 * 1024)
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//Number of blocks per epoch
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#define RANDOMX_EPOCH_BLOCKS 2048
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//Number of blocks between the seed block and the start of new epoch
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#define RANDOMX_EPOCH_LAG 64
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//Number of instructions in a RandomX program
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//Number of instructions in a RandomX program
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#define RANDOMX_PROGRAM_SIZE 256
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#define RANDOMX_PROGRAM_SIZE 256
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@ -40,13 +40,6 @@ along with RandomX. If not, see<http://www.gnu.org/licenses/>.
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#include "argon2.h"
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#include "argon2.h"
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#include "argon2_core.h"
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#include "argon2_core.h"
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#if defined(__SSE2__)
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#include <wmmintrin.h>
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#define PREFETCHNTA(x) _mm_prefetch((const char *)(x), _MM_HINT_NTA)
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#else
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#define PREFETCH(memory)
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#endif
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randomx_dataset::~randomx_dataset() {
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randomx_dataset::~randomx_dataset() {
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}
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}
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@ -43,30 +43,27 @@ namespace randomx {
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constexpr int ISMULH_R = 10;
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constexpr int ISMULH_R = 10;
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constexpr int ISMULH_M = 11;
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constexpr int ISMULH_M = 11;
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constexpr int IMUL_RCP = 12;
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constexpr int IMUL_RCP = 12;
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//constexpr int ISDIV_C = 13;
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constexpr int INEG_R = 13;
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constexpr int INEG_R = 14;
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constexpr int IXOR_R = 14;
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constexpr int IXOR_R = 15;
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constexpr int IXOR_M = 15;
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constexpr int IXOR_M = 16;
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constexpr int IROR_R = 16;
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constexpr int IROR_R = 17;
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constexpr int IROL_R = 17;
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constexpr int IROL_R = 18;
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constexpr int ISWAP_R = 18;
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constexpr int ISWAP_R = 19;
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constexpr int FSWAP_R = 19;
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constexpr int FSWAP_R = 20;
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constexpr int FADD_R = 20;
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constexpr int FADD_R = 21;
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constexpr int FADD_M = 21;
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constexpr int FADD_M = 22;
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constexpr int FSUB_R = 22;
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constexpr int FSUB_R = 23;
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constexpr int FSUB_M = 23;
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constexpr int FSUB_M = 24;
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constexpr int FSCAL_R = 24;
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constexpr int FSCAL_R = 25;
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constexpr int FMUL_R = 25;
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constexpr int FMUL_R = 26;
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constexpr int FDIV_M = 26;
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constexpr int FMUL_M = 27;
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constexpr int FSQRT_R = 27;
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constexpr int FDIV_R = 28;
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constexpr int COND_R = 28;
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constexpr int FDIV_M = 29;
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constexpr int COND_M = 29;
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constexpr int FSQRT_R = 30;
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constexpr int CFROUND = 30;
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constexpr int COND_R = 31;
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constexpr int ISTORE = 31;
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constexpr int COND_M = 32;
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constexpr int FSTORE = 32;
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constexpr int CFROUND = 33;
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constexpr int NOP = 33;
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constexpr int ISTORE = 34;
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constexpr int FSTORE = 35;
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constexpr int NOP = 36;
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}
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}
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class Instruction {
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class Instruction {
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@ -73,14 +73,14 @@ along with RandomX. If not, see<http://www.gnu.org/licenses/>.
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#define HAVE_SMULH
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#define HAVE_SMULH
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#endif
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#endif
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static void setRoundMode__(uint32_t mode) {
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static void setRoundMode_(uint32_t mode) {
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_controlfp(mode, _MCW_RC);
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_controlfp(mode, _MCW_RC);
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}
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}
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#define HAVE_SETROUNDMODE_IMPL
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#define HAVE_SETROUNDMODE_IMPL
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#endif
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#endif
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#ifndef HAVE_SETROUNDMODE_IMPL
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#ifndef HAVE_SETROUNDMODE_IMPL
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static void setRoundMode__(uint32_t mode) {
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static void setRoundMode_(uint32_t mode) {
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fesetround(mode);
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fesetround(mode);
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}
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}
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#endif
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#endif
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@ -135,7 +135,7 @@ along with RandomX. If not, see<http://www.gnu.org/licenses/>.
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#if defined(__has_builtin)
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#if defined(__has_builtin)
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#if __has_builtin(__builtin_sub_overflow)
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#if __has_builtin(__builtin_sub_overflow)
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static inline bool subOverflow__(uint32_t a, uint32_t b) {
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static inline bool subOverflow_(uint32_t a, uint32_t b) {
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int32_t temp;
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int32_t temp;
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return __builtin_sub_overflow(unsigned32ToSigned2sCompl(a), unsigned32ToSigned2sCompl(b), &temp);
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return __builtin_sub_overflow(unsigned32ToSigned2sCompl(a), unsigned32ToSigned2sCompl(b), &temp);
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}
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}
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@ -144,7 +144,7 @@ along with RandomX. If not, see<http://www.gnu.org/licenses/>.
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#endif
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#endif
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#ifndef HAVE_SUB_OVERFLOW
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#ifndef HAVE_SUB_OVERFLOW
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static inline bool subOverflow__(uint32_t a, uint32_t b) {
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static inline bool subOverflow_(uint32_t a, uint32_t b) {
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auto c = unsigned32ToSigned2sCompl(a - b);
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auto c = unsigned32ToSigned2sCompl(a - b);
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return (c < unsigned32ToSigned2sCompl(a)) != (unsigned32ToSigned2sCompl(b) > 0);
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return (c < unsigned32ToSigned2sCompl(a)) != (unsigned32ToSigned2sCompl(b) > 0);
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}
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}
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@ -166,16 +166,16 @@ static inline double FlushNaN(double x) {
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void setRoundMode(uint32_t rcflag) {
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void setRoundMode(uint32_t rcflag) {
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switch (rcflag & 3) {
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switch (rcflag & 3) {
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case RoundDown:
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case RoundDown:
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setRoundMode__(FE_DOWNWARD);
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setRoundMode_(FE_DOWNWARD);
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break;
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break;
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case RoundUp:
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case RoundUp:
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setRoundMode__(FE_UPWARD);
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setRoundMode_(FE_UPWARD);
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break;
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break;
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case RoundToZero:
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case RoundToZero:
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setRoundMode__(FE_TOWARDZERO);
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setRoundMode_(FE_TOWARDZERO);
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break;
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break;
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case RoundToNearest:
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case RoundToNearest:
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setRoundMode__(FE_TONEAREST);
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setRoundMode_(FE_TONEAREST);
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break;
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break;
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default:
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default:
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UNREACHABLE;
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UNREACHABLE;
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@ -194,9 +194,9 @@ bool condition(uint32_t type, uint32_t value, uint32_t imm32) {
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case 3:
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case 3:
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return unsigned32ToSigned2sCompl(value - imm32) >= 0;
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return unsigned32ToSigned2sCompl(value - imm32) >= 0;
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case 4:
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case 4:
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return subOverflow__(value, imm32);
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return subOverflow_(value, imm32);
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case 5:
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case 5:
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return !subOverflow__(value, imm32);
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return !subOverflow_(value, imm32);
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case 6:
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case 6:
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return unsigned32ToSigned2sCompl(value) < unsigned32ToSigned2sCompl(imm32);
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return unsigned32ToSigned2sCompl(value) < unsigned32ToSigned2sCompl(imm32);
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case 7:
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case 7:
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@ -103,13 +103,11 @@ namespace randomx {
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; xmm11 -> "a3"
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; xmm11 -> "a3"
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; xmm12 -> temporary
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; xmm12 -> temporary
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; xmm13 -> mantissa mask = 0x000fffffffffffff000fffffffffffff
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; xmm13 -> mantissa mask = 0x000fffffffffffff000fffffffffffff
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; xmm14 -> exponent 2**-240 = 0x30f000000000000030f0000000000000
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; xmm14 -> exponent 2**-240 = 0x30f00000000xxxxx30f00000000xxxxx
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; xmm15 -> scale mask = 0x81f000000000000081f0000000000000
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; xmm15 -> scale mask = 0x81f000000000000081f0000000000000
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*/
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*/
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#define NOP_TEST true
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const uint8_t* codePrologue = (uint8_t*)&randomx_program_prologue;
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const uint8_t* codePrologue = (uint8_t*)&randomx_program_prologue;
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const uint8_t* codeLoopBegin = (uint8_t*)&randomx_program_loop_begin;
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const uint8_t* codeLoopBegin = (uint8_t*)&randomx_program_loop_begin;
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const uint8_t* codeLoopLoad = (uint8_t*)&randomx_program_loop_load;
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const uint8_t* codeLoopLoad = (uint8_t*)&randomx_program_loop_load;
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@ -254,18 +252,10 @@ namespace randomx {
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void JitCompilerX86::generateProgramLight(Program& prog, ProgramConfiguration& pcfg) {
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void JitCompilerX86::generateProgramLight(Program& prog, ProgramConfiguration& pcfg) {
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generateProgramPrologue(prog, pcfg);
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generateProgramPrologue(prog, pcfg);
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//if (superscalar) {
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emit(codeReadDatasetLightSshInit, readDatasetLightInitSize);
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emit(codeReadDatasetLightSshInit, readDatasetLightInitSize);
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emitByte(CALL);
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emitByte(CALL);
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emit32(superScalarHashOffset - (codePos + 4));
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emit32(superScalarHashOffset - (codePos + 4));
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emit(codeReadDatasetLightSshFin, readDatasetLightFinSize);
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emit(codeReadDatasetLightSshFin, readDatasetLightFinSize);
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/*}
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else {
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memcpy(code + codePos, codeReadDatasetLight, readDatasetLightSize);
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codePos += readDatasetLightSize;
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emitByte(CALL);
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emit32(readDatasetLightSubOffset - (codePos + 4));
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}*/
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generateProgramEpilogue(prog);
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generateProgramEpilogue(prog);
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}
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}
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@ -483,10 +473,6 @@ namespace randomx {
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emitByte(0xc0 + instr.dst);
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emitByte(0xc0 + instr.dst);
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emit32(instr.getImm32());
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emit32(instr.getImm32());
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}*/
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}*/
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if (false && NOP_TEST) {
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emit(NOP4);
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return;
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}
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emit(REX_LEA);
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emit(REX_LEA);
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if (instr.dst == RegisterNeedsDisplacement)
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if (instr.dst == RegisterNeedsDisplacement)
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emitByte(0xac);
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emitByte(0xac);
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@ -527,18 +513,10 @@ namespace randomx {
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void JitCompilerX86::h_ISUB_R(Instruction& instr, int i) {
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void JitCompilerX86::h_ISUB_R(Instruction& instr, int i) {
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registerUsage[instr.dst] = i;
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registerUsage[instr.dst] = i;
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if (instr.src != instr.dst) {
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if (instr.src != instr.dst) {
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if (false && NOP_TEST) {
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emit(NOP3);
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return;
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}
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emit(REX_SUB_RR);
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emit(REX_SUB_RR);
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emitByte(0xc0 + 8 * instr.dst + instr.src);
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emitByte(0xc0 + 8 * instr.dst + instr.src);
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}
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}
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else {
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else {
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if (false && NOP_TEST) {
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emit(NOP7);
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return;
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}
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emit(REX_81);
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emit(REX_81);
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emitByte(0xe8 + instr.dst);
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emitByte(0xe8 + instr.dst);
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emit32(instr.getImm32());
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emit32(instr.getImm32());
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@ -571,18 +549,10 @@ namespace randomx {
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void JitCompilerX86::h_IMUL_R(Instruction& instr, int i) {
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void JitCompilerX86::h_IMUL_R(Instruction& instr, int i) {
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registerUsage[instr.dst] = i;
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registerUsage[instr.dst] = i;
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if (instr.src != instr.dst) {
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if (instr.src != instr.dst) {
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if (false && NOP_TEST) {
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emit(NOP4);
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return;
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}
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emit(REX_IMUL_RR);
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emit(REX_IMUL_RR);
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emitByte(0xc0 + 8 * instr.dst + instr.src);
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emitByte(0xc0 + 8 * instr.dst + instr.src);
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}
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}
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else {
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else {
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if (false && NOP_TEST) {
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emit(NOP7);
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return;
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}
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emit(REX_IMUL_RRI);
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emit(REX_IMUL_RRI);
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emitByte(0xc0 + 9 * instr.dst);
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emitByte(0xc0 + 9 * instr.dst);
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emit32(instr.getImm32());
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emit32(instr.getImm32());
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@ -606,12 +576,6 @@ namespace randomx {
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void JitCompilerX86::h_IMULH_R(Instruction& instr, int i) {
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void JitCompilerX86::h_IMULH_R(Instruction& instr, int i) {
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registerUsage[instr.dst] = i;
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registerUsage[instr.dst] = i;
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if (false && NOP_TEST) {
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emit(NOP3);
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emit(NOP3);
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emit(NOP3);
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return;
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}
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emit(REX_MOV_RR64);
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emit(REX_MOV_RR64);
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emitByte(0xc0 + instr.dst);
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emitByte(0xc0 + instr.dst);
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emit(REX_MUL_R);
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emit(REX_MUL_R);
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@ -641,12 +605,6 @@ namespace randomx {
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void JitCompilerX86::h_ISMULH_R(Instruction& instr, int i) {
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void JitCompilerX86::h_ISMULH_R(Instruction& instr, int i) {
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registerUsage[instr.dst] = i;
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registerUsage[instr.dst] = i;
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if (false && NOP_TEST) {
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emit(NOP3);
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emit(NOP3);
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emit(NOP3);
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return;
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}
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emit(REX_MOV_RR64);
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emit(REX_MOV_RR64);
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emitByte(0xc0 + instr.dst);
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emitByte(0xc0 + instr.dst);
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emit(REX_MUL_R);
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emit(REX_MUL_R);
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@ -676,13 +634,6 @@ namespace randomx {
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void JitCompilerX86::h_IMUL_RCP(Instruction& instr, int i) {
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void JitCompilerX86::h_IMUL_RCP(Instruction& instr, int i) {
|
||||||
if (instr.getImm32() != 0) {
|
if (instr.getImm32() != 0) {
|
||||||
if (false && NOP_TEST) {
|
|
||||||
emitByte(0x66);
|
|
||||||
emitByte(0x66);
|
|
||||||
emit(NOP8);
|
|
||||||
emit(NOP4);
|
|
||||||
return;
|
|
||||||
}
|
|
||||||
registerUsage[instr.dst] = i;
|
registerUsage[instr.dst] = i;
|
||||||
emit(MOV_RAX_I);
|
emit(MOV_RAX_I);
|
||||||
emit64(randomx_reciprocal(instr.getImm32()));
|
emit64(randomx_reciprocal(instr.getImm32()));
|
||||||
@ -704,18 +655,10 @@ namespace randomx {
|
|||||||
void JitCompilerX86::h_IXOR_R(Instruction& instr, int i) {
|
void JitCompilerX86::h_IXOR_R(Instruction& instr, int i) {
|
||||||
registerUsage[instr.dst] = i;
|
registerUsage[instr.dst] = i;
|
||||||
if (instr.src != instr.dst) {
|
if (instr.src != instr.dst) {
|
||||||
if (false && NOP_TEST) {
|
|
||||||
emit(NOP3);
|
|
||||||
return;
|
|
||||||
}
|
|
||||||
emit(REX_XOR_RR);
|
emit(REX_XOR_RR);
|
||||||
emitByte(0xc0 + 8 * instr.dst + instr.src);
|
emitByte(0xc0 + 8 * instr.dst + instr.src);
|
||||||
}
|
}
|
||||||
else {
|
else {
|
||||||
if (false && NOP_TEST) {
|
|
||||||
emit(NOP7);
|
|
||||||
return;
|
|
||||||
}
|
|
||||||
emit(REX_XOR_RI);
|
emit(REX_XOR_RI);
|
||||||
emitByte(0xf0 + instr.dst);
|
emitByte(0xf0 + instr.dst);
|
||||||
emit32(instr.getImm32());
|
emit32(instr.getImm32());
|
||||||
@ -740,21 +683,12 @@ namespace randomx {
|
|||||||
void JitCompilerX86::h_IROR_R(Instruction& instr, int i) {
|
void JitCompilerX86::h_IROR_R(Instruction& instr, int i) {
|
||||||
registerUsage[instr.dst] = i;
|
registerUsage[instr.dst] = i;
|
||||||
if (instr.src != instr.dst) {
|
if (instr.src != instr.dst) {
|
||||||
if (false && NOP_TEST) {
|
|
||||||
emit(NOP3);
|
|
||||||
emit(NOP3);
|
|
||||||
return;
|
|
||||||
}
|
|
||||||
emit(REX_MOV_RR);
|
emit(REX_MOV_RR);
|
||||||
emitByte(0xc8 + instr.src);
|
emitByte(0xc8 + instr.src);
|
||||||
emit(REX_ROT_CL);
|
emit(REX_ROT_CL);
|
||||||
emitByte(0xc8 + instr.dst);
|
emitByte(0xc8 + instr.dst);
|
||||||
}
|
}
|
||||||
else {
|
else {
|
||||||
if (false && NOP_TEST) {
|
|
||||||
emit(NOP4);
|
|
||||||
return;
|
|
||||||
}
|
|
||||||
emit(REX_ROT_I8);
|
emit(REX_ROT_I8);
|
||||||
emitByte(0xc8 + instr.dst);
|
emitByte(0xc8 + instr.dst);
|
||||||
emitByte(instr.getImm32() & 63);
|
emitByte(instr.getImm32() & 63);
|
||||||
@ -949,21 +883,14 @@ namespace randomx {
|
|||||||
const int conditionMask = ((1 << RANDOMX_CONDITION_BITS) - 1) << shift;
|
const int conditionMask = ((1 << RANDOMX_CONDITION_BITS) - 1) << shift;
|
||||||
int reg = getConditionRegister();
|
int reg = getConditionRegister();
|
||||||
int target = registerUsage[reg] + 1;
|
int target = registerUsage[reg] + 1;
|
||||||
if (false && NOP_TEST) {
|
emit(REX_ADD_I);
|
||||||
emit(NOP7);
|
emitByte(0xc0 + reg);
|
||||||
emit(NOP7);
|
emit32(1 << shift);
|
||||||
emit(NOP6);
|
emit(REX_TEST);
|
||||||
}
|
emitByte(0xc0 + reg);
|
||||||
else {
|
emit32(conditionMask);
|
||||||
emit(REX_ADD_I);
|
emit(JZ);
|
||||||
emitByte(0xc0 + reg);
|
emit32(instructionOffsets[target] - (codePos + 4));
|
||||||
emit32(1 << shift);
|
|
||||||
emit(REX_TEST);
|
|
||||||
emitByte(0xc0 + reg);
|
|
||||||
emit32(conditionMask);
|
|
||||||
emit(JZ);
|
|
||||||
emit32(instructionOffsets[target] - (codePos + 4));
|
|
||||||
}
|
|
||||||
for (unsigned j = 0; j < 8; ++j) { //mark all registers as used
|
for (unsigned j = 0; j < 8; ++j) { //mark all registers as used
|
||||||
registerUsage[j] = i;
|
registerUsage[j] = i;
|
||||||
}
|
}
|
||||||
@ -973,13 +900,6 @@ namespace randomx {
|
|||||||
#ifdef RANDOMX_JUMP
|
#ifdef RANDOMX_JUMP
|
||||||
handleCondition(instr, i);
|
handleCondition(instr, i);
|
||||||
#endif
|
#endif
|
||||||
if (false && NOP_TEST) {
|
|
||||||
emit(NOP3);
|
|
||||||
emit(NOP7);
|
|
||||||
emit(NOP3);
|
|
||||||
emit(NOP3);
|
|
||||||
return;
|
|
||||||
}
|
|
||||||
emit(XOR_ECX_ECX);
|
emit(XOR_ECX_ECX);
|
||||||
emit(REX_CMP_R32I);
|
emit(REX_CMP_R32I);
|
||||||
emitByte(0xf8 + instr.src);
|
emitByte(0xf8 + instr.src);
|
||||||
|
@ -50,8 +50,8 @@ extern "C" {
|
|||||||
* subsequent Dataset initialization faster
|
* subsequent Dataset initialization faster
|
||||||
*
|
*
|
||||||
* @return Pointer to an allocated randomx_cache structure.
|
* @return Pointer to an allocated randomx_cache structure.
|
||||||
NULL is returned if memory allocation fails or if the RANDOMX_FLAG_JIT
|
* NULL is returned if memory allocation fails or if the RANDOMX_FLAG_JIT
|
||||||
is set and JIT compilation is not supported on the current platform.
|
* is set and JIT compilation is not supported on the current platform.
|
||||||
*/
|
*/
|
||||||
randomx_cache *randomx_alloc_cache(randomx_flags flags);
|
randomx_cache *randomx_alloc_cache(randomx_flags flags);
|
||||||
|
|
||||||
@ -76,9 +76,9 @@ void randomx_release_cache(randomx_cache* cache);
|
|||||||
*
|
*
|
||||||
* @param flags is the initialization flags. Only one flag is supported (can be set or not set):
|
* @param flags is the initialization flags. Only one flag is supported (can be set or not set):
|
||||||
* RANDOMX_FLAG_LARGE_PAGES - allocate memory in large pages
|
* RANDOMX_FLAG_LARGE_PAGES - allocate memory in large pages
|
||||||
|
*
|
||||||
* @return Pointer to an allocated randomx_cache structure.
|
* @return Pointer to an allocated randomx_cache structure.
|
||||||
NULL is returned if memory allocation fails.
|
* NULL is returned if memory allocation fails.
|
||||||
*/
|
*/
|
||||||
randomx_dataset *randomx_alloc_dataset(randomx_flags flags);
|
randomx_dataset *randomx_alloc_dataset(randomx_flags flags);
|
||||||
|
|
||||||
|
@ -700,7 +700,7 @@ namespace randomx {
|
|||||||
//calculate the earliest cycle when this macro-op (all of its uOPs) can be scheduled for execution
|
//calculate the earliest cycle when this macro-op (all of its uOPs) can be scheduled for execution
|
||||||
int scheduleCycle = scheduleMop<false>(mop, portBusy, cycle, depCycle);
|
int scheduleCycle = scheduleMop<false>(mop, portBusy, cycle, depCycle);
|
||||||
if (scheduleCycle < 0) {
|
if (scheduleCycle < 0) {
|
||||||
/*if (TRACE)*/ std::cout << "Unable to map operation '" << mop.getName() << "' to execution port (cycle " << cycle << ")" << std::endl;
|
if (TRACE) std::cout << "Unable to map operation '" << mop.getName() << "' to execution port (cycle " << cycle << ")" << std::endl;
|
||||||
//__debugbreak();
|
//__debugbreak();
|
||||||
portsSaturated = true;
|
portsSaturated = true;
|
||||||
break;
|
break;
|
||||||
@ -725,7 +725,7 @@ namespace randomx {
|
|||||||
continue;
|
continue;
|
||||||
}
|
}
|
||||||
//abort this decode buffer
|
//abort this decode buffer
|
||||||
/*if (TRACE)*/ std::cout << "Aborting at cycle " << cycle << " with decode buffer " << decodeBuffer->getName() << " - source registers not available for operation " << currentInstruction.getInfo().getName() << std::endl;
|
if (TRACE) std::cout << "Aborting at cycle " << cycle << " with decode buffer " << decodeBuffer->getName() << " - source registers not available for operation " << currentInstruction.getInfo().getName() << std::endl;
|
||||||
currentInstruction = SuperscalarInstruction::Null;
|
currentInstruction = SuperscalarInstruction::Null;
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
@ -748,7 +748,7 @@ namespace randomx {
|
|||||||
continue;
|
continue;
|
||||||
}
|
}
|
||||||
//abort this decode buffer
|
//abort this decode buffer
|
||||||
/*if (TRACE)*/ std::cout << "Aborting at cycle " << cycle << " with decode buffer " << decodeBuffer->getName() << " - destination registers not available" << std::endl;
|
if (TRACE) std::cout << "Aborting at cycle " << cycle << " with decode buffer " << decodeBuffer->getName() << " - destination registers not available" << std::endl;
|
||||||
currentInstruction = SuperscalarInstruction::Null;
|
currentInstruction = SuperscalarInstruction::Null;
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
|
@ -42,7 +42,6 @@ namespace randomx {
|
|||||||
|
|
||||||
template<class Allocator, bool softAes>
|
template<class Allocator, bool softAes>
|
||||||
void CompiledVm<Allocator, softAes>::execute() {
|
void CompiledVm<Allocator, softAes>::execute() {
|
||||||
//executeProgram(reg, mem, scratchpad, InstructionCount);
|
|
||||||
compiler.getProgramFunc()(reg, mem, scratchpad, RANDOMX_PROGRAM_ITERATIONS);
|
compiler.getProgramFunc()(reg, mem, scratchpad, RANDOMX_PROGRAM_ITERATIONS);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -28,10 +28,6 @@ along with RandomX. If not, see<http://www.gnu.org/licenses/>.
|
|||||||
|
|
||||||
namespace randomx {
|
namespace randomx {
|
||||||
|
|
||||||
extern "C" {
|
|
||||||
void executeProgram(RegisterFile&, MemoryRegisters&, uint8_t* /* scratchpad */, uint64_t);
|
|
||||||
}
|
|
||||||
|
|
||||||
template<class Allocator, bool softAes>
|
template<class Allocator, bool softAes>
|
||||||
class CompiledVm : public VmBase<Allocator, softAes> {
|
class CompiledVm : public VmBase<Allocator, softAes> {
|
||||||
public:
|
public:
|
||||||
|
@ -115,7 +115,6 @@ namespace randomx {
|
|||||||
void InterpretedVm<Allocator, softAes>::executeBytecode(int& ic, int_reg_t(&r)[8], __m128d (&f)[4], __m128d (&e)[4], __m128d (&a)[4]) {
|
void InterpretedVm<Allocator, softAes>::executeBytecode(int& ic, int_reg_t(&r)[8], __m128d (&f)[4], __m128d (&e)[4], __m128d (&a)[4]) {
|
||||||
auto& ibc = byteCode[ic];
|
auto& ibc = byteCode[ic];
|
||||||
if (trace) std::cout << std::dec << std::setw(3) << ic << " " << program(ic);
|
if (trace) std::cout << std::dec << std::setw(3) << ic << " " << program(ic);
|
||||||
//if(trace) printState(r, f, e, a);
|
|
||||||
switch (ibc.type)
|
switch (ibc.type)
|
||||||
{
|
{
|
||||||
case InstructionType::IADD_RS: {
|
case InstructionType::IADD_RS: {
|
||||||
@ -237,15 +236,9 @@ namespace randomx {
|
|||||||
*ibc.creg += (1 << ibc.shift);
|
*ibc.creg += (1 << ibc.shift);
|
||||||
const uint64_t conditionMask = ((1ULL << RANDOMX_CONDITION_BITS) - 1) << ibc.shift;
|
const uint64_t conditionMask = ((1ULL << RANDOMX_CONDITION_BITS) - 1) << ibc.shift;
|
||||||
if ((*ibc.creg & conditionMask) == 0) {
|
if ((*ibc.creg & conditionMask) == 0) {
|
||||||
#ifdef STATS
|
|
||||||
count_JUMP_taken++;
|
|
||||||
#endif
|
|
||||||
ic = ibc.target;
|
ic = ibc.target;
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
#ifdef STATS
|
|
||||||
count_JUMP_not_taken++;
|
|
||||||
#endif
|
|
||||||
#endif
|
#endif
|
||||||
*ibc.idst += condition(ibc.condition, *ibc.isrc, ibc.imm) ? 1 : 0;
|
*ibc.idst += condition(ibc.condition, *ibc.isrc, ibc.imm) ? 1 : 0;
|
||||||
} break;
|
} break;
|
||||||
@ -255,15 +248,9 @@ namespace randomx {
|
|||||||
*ibc.creg += (1uLL << ibc.shift);
|
*ibc.creg += (1uLL << ibc.shift);
|
||||||
const uint64_t conditionMask = ((1ULL << RANDOMX_CONDITION_BITS) - 1) << ibc.shift;
|
const uint64_t conditionMask = ((1ULL << RANDOMX_CONDITION_BITS) - 1) << ibc.shift;
|
||||||
if ((*ibc.creg & conditionMask) == 0) {
|
if ((*ibc.creg & conditionMask) == 0) {
|
||||||
#ifdef STATS
|
|
||||||
count_JUMP_taken++;
|
|
||||||
#endif
|
|
||||||
ic = ibc.target;
|
ic = ibc.target;
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
#ifdef STATS
|
|
||||||
count_JUMP_not_taken++;
|
|
||||||
#endif
|
|
||||||
#endif
|
#endif
|
||||||
*ibc.idst += condition(ibc.condition, load64(getScratchpadAddress(ibc)), ibc.imm) ? 1 : 0;
|
*ibc.idst += condition(ibc.condition, load64(getScratchpadAddress(ibc)), ibc.imm) ? 1 : 0;
|
||||||
} break;
|
} break;
|
||||||
@ -328,7 +315,6 @@ namespace randomx {
|
|||||||
}
|
}
|
||||||
|
|
||||||
for(unsigned ic = 0; ic < RANDOMX_PROGRAM_ITERATIONS; ++ic) {
|
for(unsigned ic = 0; ic < RANDOMX_PROGRAM_ITERATIONS; ++ic) {
|
||||||
//std::cout << "Iteration " << iter << std::endl;
|
|
||||||
uint64_t spMix = r[config.readReg0] ^ r[config.readReg1];
|
uint64_t spMix = r[config.readReg0] ^ r[config.readReg1];
|
||||||
spAddr0 ^= spMix;
|
spAddr0 ^= spMix;
|
||||||
spAddr0 &= ScratchpadL3Mask64;
|
spAddr0 &= ScratchpadL3Mask64;
|
||||||
@ -366,7 +352,6 @@ namespace randomx {
|
|||||||
mem.mx ^= r[config.readReg2] ^ r[config.readReg3];
|
mem.mx ^= r[config.readReg2] ^ r[config.readReg3];
|
||||||
mem.mx &= CacheLineAlignMask;
|
mem.mx &= CacheLineAlignMask;
|
||||||
datasetRead(mem.ma, r);
|
datasetRead(mem.ma, r);
|
||||||
//executeSuperscalar(datasetBase + mem.ma / CacheLineSize, r);
|
|
||||||
std::swap(mem.mx, mem.ma);
|
std::swap(mem.mx, mem.ma);
|
||||||
|
|
||||||
if (trace) {
|
if (trace) {
|
||||||
@ -450,22 +435,6 @@ namespace randomx {
|
|||||||
r[i] ^= datasetLine[i];
|
r[i] ^= datasetLine[i];
|
||||||
}
|
}
|
||||||
|
|
||||||
/*template<bool superscalar>
|
|
||||||
void InterpretedVirtualMachine<superscalar>::precompileSuperscalar(SuperscalarProgram* programs) {
|
|
||||||
memcpy(superScalarPrograms, programs, sizeof(superScalarPrograms));
|
|
||||||
reciprocals.clear();
|
|
||||||
for (unsigned i = 0; i < RANDOMX_CACHE_ACCESSES; ++i) {
|
|
||||||
for (unsigned j = 0; j < superScalarPrograms[i].getSize(); ++j) {
|
|
||||||
Instruction& instr = superScalarPrograms[i](j);
|
|
||||||
if (instr.opcode == SuperscalarInstructionType::IMUL_RCP) {
|
|
||||||
auto rcp = reciprocal(instr.getImm32());
|
|
||||||
instr.setImm32(reciprocals.size());
|
|
||||||
reciprocals.push_back(rcp);
|
|
||||||
}
|
|
||||||
}
|
|
||||||
}
|
|
||||||
}*/
|
|
||||||
|
|
||||||
#include "instruction_weights.hpp"
|
#include "instruction_weights.hpp"
|
||||||
|
|
||||||
template<class Allocator, bool softAes>
|
template<class Allocator, bool softAes>
|
||||||
|
@ -49,8 +49,6 @@ namespace randomx {
|
|||||||
uint16_t shift;
|
uint16_t shift;
|
||||||
};
|
};
|
||||||
|
|
||||||
constexpr int asedwfagdewsa = sizeof(InstructionByteCode);
|
|
||||||
|
|
||||||
template<class Allocator, bool softAes>
|
template<class Allocator, bool softAes>
|
||||||
class InterpretedVm : public VmBase<Allocator, softAes> {
|
class InterpretedVm : public VmBase<Allocator, softAes> {
|
||||||
public:
|
public:
|
||||||
|
Loading…
Reference in New Issue
Block a user